ONE APPROACH TO COMPACT TESTING OF DIGITAL CIRCUITS

A problem of signature analyzer synthesis with required properties is solved for digital schemes compact testing. The main attention is devoted to the issues of eliminating losses of diagnostic information and to simplicity of structural organization. Solutions are based on detecting all error vectors or matrices resulting from failures of diagnostics objects related to the postulated class. Any other error vectors or matrices can be non-detectable and are excluded from consideration. For the compact testing of separate units of complex digital systems, the problem of synthesis of the generator structure that reproduces an assigned sequence of binary sets is being solved. Increased attention is given to issues of the non-excessive reproduction of sets sequence and structural organization simplicity. The solution is based on the application of a mathematical tool for linear sequence machines. A software implementation of the mathematical model is proposed. Error vectors or matrix detection process visualization aids are given. Additionally, means of the binary sets generation process visualization are presented.


INTRODUCTION
Self-testing of diagnostics objects (DO) is a maximally self-contained method of embedded diagnostics testing, because the generation of test inputs and analysis of the results of test information are not supported by the system facilities [1]. Actually, any self-testing method is based on test impacts generation and compact representation of test impact passage results. Therefore, the problem of sound selection of embedded equipment parameters is essential for any DO manufacturing process [2][3]. Currently the need for cost-effective testing systems is increasing due to the enhanced level of integration of computing equipment component base. Therefore, the trend toward decreasing the complexity of diagnostic facilities hardware exists. Built-in test aids are of great importance, for example, in large and extra-large integrated circuits development [3][4]. The methodology of digital systems diagnosis based on transformation of binary sequences coming to the DO into compact specifi cations --signatures, comparison of obtained signatures with reference signatures, and corresponding processing of comparison results --are the essence of signature analysis [5][6][7]. As a rule, mathematical tools from antinoise coding theory are used as a theoretical apparatus for signature analyzer development. However, theoretical substantiation of the development of hardware signature analyzers (SA) with required properties is most advantageous when based on the mathematical tools of linear sequential machines (LSM) [8][9]. A classical signature analyzer is in principle unable to detect all possible combinations of errors. Some part of them will never appear at the DO output, and therefore there is no need to detect them. The following task is posed in this paper: to build a simple signature analyzer that would detect all DO errors caused by the faults from the postulated class. A control test, especially when dealing with limited time dedicated to the control, is a "mixture" of pseudo-random and deterministic sets of test impacts. Hardware for the generation of pseudo-random sets is well known, and there are no serious problems in their implementation [10][11]. However, the storage of the deterministic part of a check test in read-only memory, as a rule, is not always acceptable, because it is related to signifi cant hardware requirements. In conjunction with this, the task of creating simple hardware that reproduces assigned binary sets sequence that compose the deterministic part of the check test arises.

A LINEAR SEQUENTIAL MACHINE AS A SIGNATURE ANALYZER
Processes in LSM with l -inputs, m -outputs, and n -memory elements ( Figure 1) are described by linear system of state equations and linear system of output equations, which appear as follows in matrix form: the characteristic matrices, in which elements in behavior equations are presented in a Galois fi eld GF (2). Input U t , output, Y t and S t LSM state at a time moment t are specifi ed in the form of corresponding column vectors The structure of LSM is described by the matrix of the connection A of memory elements, in which every element a ij is defi ned as follows: a ij = 1, if the output of the j-th memory element is connected to the input of the i-th memory element; a ij = 0, otherwise. Other matrices can be interpreted similarly, matrices which set links between inputs and memory elements (B), between memory elements and outputs (C), and between inputs and outputs (D). It is expedient to implement the analysis of DO responses l with the outputs for test input under conditions of limited resources for additionally introducing hardware, by connecting LSM l with inputs ( Figure 2), and this will serve as the signature analyzer.

Figure 2: Diagnostics object with signature analyzer
When DO testing is complete, SA memory element states will be equal to modulo two sum of the reference signature R st and R er error signature R st + R er . At that, a failure will be revealed if R er ≠ 0. A method of deriving signatures and proof of the effectiveness of their use are essential here, i.e. the possibility of detecting errors with an acceptable probability after compression of binary sequences. It is known that the probability of not detecting an error P ud in a sequence of interchangeable logical states at DO output (l = 1) is equal to [09]: where N -is the length of the sequence, nis the number of SA digits ( N >> n). In other words, compressing a long sequence into a short signature is associated with diagnostics information loss. It is proposed to exclude recognition ambiguity inherent to compact testing, as follows. It is necessary to build LSM that detects the entire set of error vectors (l = 1) or matrices (l ≥ 2) of DO response to the control test which are caused by the specifi cation of failures from the postulated class. Of course, there is no need to reveal vectors or matrices of errors which cannot appear at DO outputs in principle.

A SIGNATURE ANALYZER WITH REQUIRED PROPERTIES
Let there be an l-output digital network, and a sequence of tests consisting of N binary sets comprising a full test for it, i.e., ensuring the appearance of any fault from the postulated class at the network outputs , if at the j-th set of input sequence the object response that is in the v-th technical state, coincides with a reference response at the i-th output; Evgeniy Feofanovich Berezkin -One approach to compact testing of digital circuits An error vector is a special case of an error matrix when l = 1. Let's represent error matrix also in the following form: A task solving algorithm includes steps which description is essentially a proof of the justifi ability of ideas laid out as the basis of the suggested approach: (the process is shown at Figure 3) We shall search for a polynomial  At that, it should be remembered that The detailed argumentation of these relations is given in [08]. Matrices C and D are of no principal signifi cance for signature analysis and are not considered here. The complete DO test is built using the Rot d-algorithm, and these error vectors are obtained using digital simulation with introduction of possible faults [14]. So, we fi nd a characteristic polynomial

We shall synthesize an l-channel
corresponds, and build a matrix

AN AUTONOMOUS LINEAR SEQUENCE MACHINE AS A BINARY SETS SEQUENCE GENERATOR
In [12], it was proposed to use LSM which under the impact of a special control sequence generates an assigned binary sets sequence. In this process, excessive intermediate sets appear at the output of LSM that have to be masked. In [13] a register of shift with non-linear feedback function is composed. However, even in this case it is not possible to get rid of excessive intermediate sets.
An autonomous linear sequence machine (ALSM), whose state does not depend on input impacts, is traditionally used for the creation of pseudo-random binary sets sequence. In this work, the following task is set up: to use ALSM as a simple generator that will be able to reproduce an absolutely precisely assigned binary sets sequence forming check test. Processes in ALSM with m-outputs and n-memory elements ( Figure 5) are described by the linear system of state equations and a linear system of equations of outputs that in matrix form look as follows:

THE SYNTHESIS OF A BINARY SETS SEQUENCE GENERATOR
The considered method of the synthesis of a binary sets assigned sequence generator consists of the following. It is necessary to fi nd such a polynomial of a minimal degree r ≤ n, that columns H n , starting with Y r , could be presented by the same linear combination of previous r columns. Analytically, it could be presented in the following way: The characteristic matrices of the sequence generator H n that shift register with feedback at r -j < 0. The consequence is that determined in the following way: . ...
In a number of cases the inverse matrix F r -1 could be calculated in a more simple way: In a worst case scenario, when it is not possible to fi nd the linear combination mentioned above, a polynomial , and the generator of an assigned sequence will be n-bit shift register without feedback connections.  [15]: H can must meet the requirements: -not to contain zero lines (linear dependant lines are transformed in zero ones); -the fi rst one in each line must be located on the right from the fi rst one of the previous line; -in each column containing such a unit, the remaining elements are equal to zero, if they are located below this one. In this case, H can has the appearance typical for this particular case, because the fi rst fi ve columns of the matrix H can are linear independent.
In matrix H can in the lower line the fi rst one is in column number four. Consequently, the lower limit of the digit capacity of ALSM in search is equal to fi ve.

The column number fi ve is presented in the form of a linear combination of the fi ve previous ones Y(5) = Y(3) + Y(2) + Y(0). However Y(6) ≠ Y(4) + Y(3) + Y(1).
Consequently, we construct the linear combination dependence of the column number six from the six previous ones Y(6) = Y(3) + Y(2) + Y (1), because the fi fth column is no longer expressed through the previous columns. This relation stays in power also for column number seven Y(7) = Y(4) + Y(3) + Y (2). That's why the polynomial in a search takes the form Feedback coeffi cients of the shift register in accordance with ) (x  is set as follows: And fi nally, we calculate the matrix of relations of the ALSM outputs with delay elements Synthesized an autonomous linear sequence machine is presented in Figure 6.

VISUALIZATION OF THE SIGNATURE ANALYZER AND GENERATOR OPERATING PROCESS
The software implementation of mathematical models of DO with arbitrary confi guration and structure (Figures 7  and 8), which was developed by the author in the DEL-PHI 7.0 programming environment using the hypertext help systems on-line documentation HTML Help Workshop, confi rms the validity of the functioning of the developed algorithms. Screen forms of SA synthesis and generator for fi nal results for digital networks derived using the software model are shown at Figures 9 and 10 for illustration purposes.
Step-by-step observation of error vectors or error matrix detection process in the software model allows assuring visually that the terminal state of SA memory elements differs from the null state, i.e. R er ≠ 0. A step-by-step observation of binary sets generation in the program model allows a visual confi rmation of this process.

CONCLUSIONS
Thus, the algorithm developed for building a signature analyzer that detects all faults from the postulated class permits synthesis of single-channel and multi-channel LSM structures that are simple in implementation, and free from ambiguity in identifi cation of the technical state of diagnostics objects. Consequently, the developed algorithm of constructing ALSM reproducing assigned test sets sequence does not require the construction of a special controlling sequence and does not generate the need for excessive sets.
Together, these two approaches make it possible to implement one of the most effi cient methods of built-in compact testing of separate components of complicated digital systems.
Furthermore, technical implementation of a diagnostics process using signature analysis with required properties of complex digital systems becomes fairly simple. This fact allows to decrease substantially the requirements for testing staff profi ciencies, and to reduce signifi cantly the total tests cost.